基于全自旋逻辑器件的三输入奇偶校验器设计及其时钟控制方法Design of a Three-Input Parity Checker Based on an All-Spin Logic Device and Its Clock Control Methodology
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纳米技术 Vol.14 No.2, May 16 2024, PDF, HTML, XML DOI:10.12677/nat.2024.1412002 被引量